A process for manufacturing an electronic device such as a semiconductor element includes an exposure step. In the exposure step, a wafer is coated with photoresist, and then an exposure apparatus transfers a pattern of a photomask to the photoresist. A reduction exposure apparatus, which reduces and exposes the pattern of the photomask onto the wafer, has been known as the exposure apparatus. A stepper that exposes the pattern of the photomask in one-shot and a scanner that scans an exposure region have been known as the reduction exposure apparatus. A reticle has been known as a photomask.
When an area exposed by the exposure apparatus includes an area outside of the wafer, a first method, disclosed in Japanese Laid-open Patent Publication No. 5-304075, obtains focus data within the wafer, and exposes the area including the area outside of the wafer. A second method, disclosed in Japanese Laid-open Patent Publication No. 2009-88549, uses a photomask having two or more regions, and exposes a center portion and an edge portion of the wafer with proper regions of the photomask. A third method, disclosed in Japanese Laid-open Patent Publication Nos. 2000-82649 and 9-22863, shields a region in which a lack of a shot pattern at the edge portion of the wafer occurs from light to prevent the lack of the shot pattern at the edge portion of the wafer.